HP-Agilent/Keysight 16950B

Timing Analysis (Asynchronous Sampling) – 4 GHz (250 ps) timing zoom with 64 K memory – 1.2 GHz / 600 MHz (half / full-channel) conventional timing with deep memory – 600 MHz transitional timing State Analysis (Synchronous Sampling) – State clock rates up to 667 MHz – Data rates: up to 1066 Mb/s (Dual Sample), up to 667 Mb/s (Double Data Rate – DDR) – Automated threshold/sample position setup for accurate measurements on high-speed buses – Simultaneous eye diagrams on all channels identify problem signals quickly Configuration Considerations – 68-channels per module, combine up to 5 modules for 340 channels – Selectable memory depths: 1 M, 4 M, 16 M, 32 M, 64 M Memory Depth Upgrade Options – Compatible with 90-pin logic analyzer probes. Probes are ordered separately. Keysight’s Probe Recommendations – Compatible with 16900 Series modular logic analyzers Additional Capabilities – Comprehensive single-ended and differential signal support, threshold is adjustable from -3 V to 5 V (10 mV increments)